[tz] [PROPOSED 1/7] Avoid undefined behavior if no Link lines
Guy Harris
gharris at sonic.net
Thu Oct 27 19:03:15 UTC 2022
On Oct 27, 2022, at 8:47 AM, Garrett Wollman via tz <tz at iana.org> wrote:
> <<On Thu, 27 Oct 2022 07:38:42 +0100, "Clive D.W. Feather via tz" <tz at iana.org> said:
>
>> Why not? You're assuming that NULL is represented by 32 or 64 zero bits [1].
>> That's not what all computers do. Unusual architectures may do something
>> completely different
>
> I don't want to speak for Paul, but I think it is a true statement
> that such an "unusual architecture" would be unsaleable today.
I don't know whether the AS/400 systems represent null pointers in an unusual fashion (although I wouldn't be surprised if they do), but IBM still sells systems running the same operating system as the AS/400 (including the low-level "System Licensed Internal Code" system software, originally called "vertical microcode" in System/38 in order to convince courts that would enforce a feared future antitrust action that it's not software that IBM needs to offer to clone makers):
https://www.ibm.com/it-infrastructure/power/os/ibm-i
S/38, AS/400. and LPARs running IBM i on an IBM Power Systems machine are... somewhat odd systems. The nominal target for compilers is
https://www.ibm.com/docs/en/i/7.3?topic=interfaces-i-machine-interface
which is the current version of
http://bitsavers.org/pdf/ibm/system38/GA21-9331-1_System_38_Functional_Reference_Manual_Feb81.pdf
http://bitsavers.org/pdf/ibm/system38/GA21-9330-4_IBM_System_38_Functional_Concepts_5th_ed_198509.pdf
(for which there was no C implementation - that first showed up in AS/400).
However, that instruction set is not directly executed; instead, a component of the "vertical microcode"/"System Licensed Internal Code", all of which runs in main memory, translates that "machine interface" code into machine code, and *that's* what's run. The machine code instruction set - which is also the machine code instruction set into which the "vertical microcode"/"System Licensed Internal Code" source is compiled/assembled - is currently Power ISA plus some IBM I-specific extensions, including
https://www.devever.net/~hl/ppcas
plus some other instructions such as decimal arithmetic helpers, some of which may now be documented parts of Power ISA, and was originally a somewhat oddball instruction set:
http://bitsavers.org/pdf/ibm/system38/SC21-9037-3_IBM_System_38_Internal_Microprogramming_Instructions_Formats_and_Functions_Reference_4th_ed_198508.pdf
in System/38 (and some variant of which was probably the machine code instruction set in the CISC AS/400 models). That instruction set was implemented in what would generally be considered by microcode on various S/38 and AS/400 models; that was the "horizontal microcode" on those machines.
And there are C and C++ compilers for IBM i:
https://www.ibm.com/docs/en/i/7.4?topic=c-ile-cc-compiler-reference
There's also, presumably, some (possibly internal-only) version of the C++ compiler for Power ISA targets that is used for most of the "System Licensed Internal Code" for RISC AS/400 and IBM Power Systems IBM i, as that's mostly written in C++. (I think the original "vertical microcode" for System/38 and AS/400 was written in one of IBM's many PL/I-derived internal languages, this one being named PL/MP for "Programming Language/Machine Product".)
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